1. Field of the Invention
The present invention relates to a semiconductor device, and relates, for example, to a semiconductor device including a high-voltage transistor which is used in order to transfer a high voltage to a NAND flash memory.
2. Description of the Related Art
Conventionally, as an example of a semiconductor memory, there is known an EEPROM (Electrically Erasable Programmable Read Only Memory) which is electrically rewritable. In addition, a NAND flash memory, which can be integrated at high density, is known as an example of the EEPROM.
In the case where data is to be written in memory cell transistors, which constitute the NAND flash memory, a high voltage of, e.g. about 20 to 40 V, is needed. Thus, high-voltage transistors, which are used in order to transfer a high voltage to the memory cell transistors, are disposed in a row decoder.
In the meantime, the threshold voltage of the high-voltage transistor that is used for transferring a high voltage rises due to a back bias effect. If the degree of increase of the threshold voltage due to the back bias effect is large, the performance of the high-voltage transistor for transferring a high voltage would decrease.
In addition, if the degree of increase of the threshold voltage of the high-voltage transistor is large, the maximum voltage that is used in the NAND flash memory increases accordingly. As a result, a boost circuit increases in scale, leading to an increase in chip size and in manufacturing cost. Therefore, an improvement in the back bias effect of the high-voltage transistor is important, and, in particular, this is a great challenge for the circuit for high voltage transfer, such as a row decoder.
As related art of this technique, there has been disclosed a technique for preventing field inversion which is a factor of current flow between transistors which neighbor, with an element isolation insulation layer being interposed (Jpn. Pat. Appln. KOKAI Publication No. 2006-59978).